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YAC526
EVR3
Electric Variable Resistance 3
Outline
YAC526 (EVR3) is a 2ch high grade digital volume LSI for high-end audio systems. Owing to its built-in high-quality sound operational amplifier, output with wide dynamic range and low distortion factor can be obtained. YAC526 is able to control each channel through a serial data interface in 255 steps at 0.5dB per step, and daisy chain connection can constitute a multichannel system. Owing to its zero-cross detection function, the device is able to suppress audible noise that may occur at a quick volume change.
Features
Built-in 2channel high sound quality operational amplifier. Wide volume range. 31.5dB 95.0dB, MUTE (0.5dB/step, 255 steps) Maximum input signal amplitude 4.2Vrms (6V power supply) Low distortion (THD) 0.0002 typ. (Input=1Vrms@1kHz, Gain=0dB Low residual noise 1.2Vrms typ. (Gain=MUTE, IHF-A) Power supply voltage 4.75V6.6V Silicon gate CMOS process. 24-pin plastic SSOP. The plating of pins is lead-free.(YAC526-EZ)
YAC526 CATALOG CATALOG No.:LSI-4AC526A2 2003.10
YAC526
Terminal configration
ZCEN1 ZCEN2 CSN SDATAI DGND REF DVSS SCLK SDATAO TE1 TE2 TE3 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 IN1 REF1A REF1B OUT1 AVDD AVSS AVSS AVDD OUT2 REF2B REF2A IN2
24 pin SSOP Top View Terminal function
No. Name 1 ZCEN1 I/O Function I Zero-cross control input 1. Select one from four types of zero-cross modes including non-zerocross mode. When changing zero-cross modes during operation, set the system so that it changes at 1 second or more after the rise of CSN signal. 2 ZCEN2 I Zero-cross control input 2. Select one from four types of zero-cross modes including non-zerocross mode. When changing zero-cross modes during operation, set the system so that it changes at 1 second or more after the rise of CSN signal. 3 CSN I Chip select input 4 SDATAI I Serial data input 5 DGND - Digital ground 6 REF O Reference voltage output for digital For attaining stabilization, connect this terminal to DVSS terminal through a capacitance of 10F or higher (CREF). And please do not use this terminal output for the drive purpose of an external circuit. 7 DVSS - Minus power supply for digital (-6.0V Typ.) 8 SCLK I Serial clock input 9 SDATAO OD Serial data output Serial data are outputted from this terminal when CSN pin is "L" level. This terminal becomes high-impedance state when CSN pin is "H". Since it is an open drain output pin, pull it up through a resistor to the power supply voltage (to be AVDD or less) of a device to be connected. Do not allow output current of 1.5mA or over. 10 TE1 I Test terminal (Pull-down) Non connection or connect to DGND terminal. 11 TE2 I Test terminal (Pull-down) Non connection or connect to DGND terminal. 12 TE3 I Test terminal (Pull-down) Non connection or connect to DGND terminal. 13 IN2 AI ch2 analog input The output impedance of input signal source is used less than 10k. When avoid the use of this terminal, connect to ground. 14 REF2A AI ch2 analog reference voltage input A Connect to ground directly. 15 REF2B AI ch2 analog reference voltage input B Connect to ground directly. 16 OUT2 AO ch2 analog output 17 AVDD - Plus power supply for analog (+6.0V Typ.) 18 AVSS - Minus power supply for analog (-6.0V Typ.) 19 AVSS - Minus power supply for analog (-6.0V Typ.) 20 AVDD - Plus power supply for analog (+6.0V Typ.) 21 OUT1 AO ch1 analog output 22 REF1B AI ch1 analog reference voltage input B Connect to ground directly. 23 REF1A AI ch1 analog reference voltage input A Connect to ground directly. 24 IN1 AI ch1 analog input The output impedance of input signal source is used less than 10k. When avoid the use of this terminal, connect to ground. Note A: analog terminal, OD: Open drain output terminal, "L" level means VIL, "H" level means VIH.
2
YAC526
Block diagram
IN1
Vol B: 10k
0-95dB 0+31.5dB OPAmp
100
OUT1
REF1B REF1A
Vol A: 15k
AVDD DGND REF AVSS DVSS
Zero Crossing Detector
Control Register
Zero Crossing Detector 16
S/P Register
TE1 TE2 TE3 ZCEN1 ZCEN2 SDATAO(OpenDrain) SDATAI SCLK CSN
Vol A: 15k
REF2A REF2B
Vol B: 10k 0+31.5dB 0-95dB OPAmp
100
OUT2
IN2
3
YAC526
Description of functions
Analog functions Maximum input voltage The maximum amplitude of the input signal that is inputted to the analog input pin of YAC526 is 4.2Vrms when power supply voltage is 6V. For a system to which a signal exceeding the power supply voltage (AVDD/AVSS) may be applied, use external diodes to suppress the signal to the maximum rating or less. Maximum output voltage The maximum output voltage(THD<1) of the signal that is outputted from the analog output pin of YAC526 is 4.2Vrms when power supply voltage is 6V and no load is connected. The output impedance is 100 (typ.). Realization of low residual noise system General audio amplifiers are designed to have input sensitivity of approximately 150mV, and have a gain of approximately 16dB at the preamplifier (PreAMP) section and approximately 30dB at the main amplifier section (MainAMP). The residual noise of YAC526 (Gain=MUTE) is 1.2Vrms (typ.) which is very small, and the device has positive side gain (max: 31.5dB). Therefore, by using YAC526 also as "PreAMP", systems with a very small residual noise and amplification of volume control noise can be configured. For conventional configurations that need a "PreAMP", even if the residual noise of the volume control itself is zero, the noise that is produced at the "PreAMP" is amplified by the gain, the noise becomes very high when it is heard at the speakers. When the input converted noise of "PreAMP" is 1V, the conventional configuration produces noise of approximately 200V at the speakers. For the configuration that uses YAC526, the noise is 38V which is very small. Residual noise produced by conventional configuration
1Vrms 6.3Vrms 200Vrms
Residual noise produced by a configuration that adopts YAC526
1.2Vrms
YAC526
38Vrms
+16dB
+30dB Zin=10k +30dB
Volume
PreAMP
MainAMP
-+16dB Volume + PreAMP MainAMP
4
YAC526
Digital functions Serial data interface Writing of volume control data into YAC526 is performed through a serial interface. SDATAI is a serial data input pin, SCLK is a clock input pin, and CSN is a chip select pin for writing the value of volume. 16-bit serial data that is inputted from SDATAI (MSB first) is taken into YAC526 at the rising edge of SCLK when CSN terminal is at "L" level. The serial data is latched at the rising edge of CSN, and volume value of each channel is set into the register. The present volume value is outputted from SDATAO pin as serial data. With this data, the control by using daisy chain connection and verification of the present volume value can be performed easily. Note that the register value after turning the power supply on is ALL"0" (muted state) and the interface is enabled after a predetermined period (tPUP) has elapsed. (Serial access is prohibited in tPUP period.) CSN SCLK SDATAI SDATAO
D1[15] D1[14] D1[13] D1[12] D1[11] D1[10] D1[7] D1[6] D1[5] D1[4] D1[3] D1[2] D1[1] D1[0]
D0[15] D0[14] D0[13] D0[12] D0[11] D0[10]
D0[7]
D0[6]
D0[5]
D0[4]
D0[3]
D0[2]
D0[1]
D0[0]
D1[15]
Assignment of volume control data
D[15: 8] Channel1 Volume data D1[15:0] is volume data value to change. D[ 7: 0] Channel2 Volume data D0[15:0] is present volume data value.
Daisy chain YAC526 is extensible to a multichannel system with daisy chain connection. For example, by connecting the device with YAC523 (7ch digital volume) through daisy chain, 8.1ch system can be attained. By connecting SDATAO pin of YAC526 (or YAC523) to SDATAI pin of YAC523 (or YAC526), YAC526 and YAC523 can be controlled simultaneously without need of a complex addressing. (It is also possible to connect multiple YAC526.) The volume data is taken into S/P (serial / parallel) registers of each LSI by setting CSN pin to "L" for 8 clock period on all channels that are connected with daisy chain. And, by setting CSN pin to "H" after the elapse of 8 clock period on all channels, the data is written from S/P registers of all YAC526 (or YAC523) that are connected with daisy chain into the control registers simultaneously to change the volume value. Example: Assignment of volume control data when a combination of YAC526 and YAC523 as described below is used.
Audio source
2 OUT IN
2 5V YAC526 SDATAO CSN SDATAI SCLK
7 OUT IN
7
YAC523 SDATAO CSN SDATAI SCLK
D[71:64] [YAC526] Channel1 Volume data D[63:56] [YAC526] Channel2 Volume data D[55:48] [YAC523] Channel1 Volume data D[47:40] [YAC523] Channel2 Volume data D[39:32] [YAC523] Channel3 Volume data D[31:24] [YAC523] Channel4 Volume data D[23:16] [YAC523] Channel5 Volume data D[15: 8] [YAC523] Channel6 Volume data D[ 7: 0] [YAC523] Channel7 Volume data
5V Controller
CSN SCLK SDATAI
D[71] D[70] D[69] D[68] D[67] D[66] D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
5
YAC526
Volume setting The relationship between input code and volume value is as shown in the following table. (As for an input code, the left serves as MSB.) Input code
11111111 11111110

Gain or attenuate(dB)
MUTE +31.5

11011111

+16.0

10111111

0

00000010 00000001 00000000
-94.5 -95.0 MUTE
The input codes ALL"0" and ALL"1" are set for mute. Zero-cross mode YAC526 incorporates the zero-cross detection function to suppress audible noise when the volume is changed quickly. A mode is selected from the following four modes by setting ZCEN1 and 2 pins. ZCEN[2:1] 00 01 10 11 Normal Zero-cross mode A Zero-cross mode B Zero-cross mode C Mode Operation Zero-cross is not detected, and the volume value is changed immediately after the rising of CSN. Zero-cross is detected after the rising of CSN, or after tTM1 (20ms) passes, volume value is changed. Zero-cross is detected after the rising of CSN, or after tTM2 (10ms) passes, volume value is changed. When the next data is written within tTM1 (20ms) for zero-cross mode A, the changed is performed at the falling of CSN by using the volume value immediately before.
t < tTM & t < tTM & t < tTM &
No zero-cross
t < tTM &
No zero-cross
No zero-cross
No zero-cross
t tTM
CSN SDATAI Volume value (Zero-cross mode A, B) Volume value (Zero-cross mode C)
-12dB -9dB -6dB -15dB(Last value) -3dB 0dB 0dB
-15dB(Last value)
-12dB
-9dB
-6dB
-3dB
0dB
Operation in each zero-cross mode when zero-cross is not detected Be careful not to change the zero-cross mode during the operation of the device, or an erroneous operation may be caused. Perform change of zero-cross mode after the elapse of 1 second or more from the rising of CSN signal. Power on reset YAC526 builds in the power on reset function that resets the volume value when the power is turned on. Since a system that perform the reset by detecting the power supply voltage level, when turning on the power supply again, do it after the power supply voltage AVDD and AVSS has reduced sufficiently (to +1.0V/ -1.0V or less). Moreover, although a volume register is reset at the time of a power supply injection, since shocking sound occurs in the case of power supply ON/OFF, please apply mute to the whole set.
6
YAC526
Electrical characteristics
1.Absolute maximum rating Item Power supply voltage Analog input terminal voltage Digital input terminal voltage Symbol AVDD-AVSS VINA VIND Min. AVSS -0.6 AVSS -0.3 -50 Max. 14.0 AVDD+0.6 and VINA-AVSS < 14.0V AVDD+0.3 and VIND-AVSS < 14.0V 125 Unit V V V
Storage temperature TSTG Note : Please use AVSS and DVSS with the same potential. DGND=0V 2. Recommended operating conditions Item Symbol Min. Analog power supply voltage(Positive) AVDD 4.75 -6.60 Analog power supply voltage(Negative) AVSS (AVSS=DVSS) DVSS -6.60 Ta Operating ambient temperature -40 Note : Please use AVSS and DVSS with the same potential. DGND=0V
Typ. 6.00 -6.00 -6.00
Max. 6.60 -4.75 -4.75 85
Unit V V V
3. Analog characteristics (Ta=25, AVDD=+6.0V, AVSS=-6.0V, DVSS=-6.0V) Item Symbol Min. Typ. Gain range Gain -95.0 Step size 0.5 Gain matching between channel (0-40dB, 1kHz) 0.1 0.2 Gain matching between channel (-80dB, 1kHz) Step error (-80dB) 0.1 Input resistance RI 10 Output resistance RO 100 Load resistance 5 RL Input capacitance CI Load capacitance CL VI Maximum input voltage (THD<1, RL=) VO Maximum output voltage (THD<1, RL=) Output noise voltage1 (In=GND, Vol=+16dB) *1 Vn1 10.0 Output noise voltage2 (In=GND, Vol=0dB) *1 Vn2 2.5 *1 Vn3 Output noise voltage3 (In=GND, Vol=Mute) 1.2 Total harmonic distortion (In=1Vrms, Vol=0dB, 1kHz) *2 THD1 0.0002 Total harmonic distortion (In=1Vrms, Vol=0dB, 20kHz) *3 THD2 0.0025 Inter channel isolation (Vol=0dB, 1kHz) Cs -130 Note : *1 : Input of other channels are analog ground, Band Width=IHF-A *2 : Input of other channels are analog ground, Band Width=400Hz30kHz *3 : Input of other channels are analog ground, Band Width=400Hz 4. Power consumption Item Symbol Power consumption(AVDD=+6V, AVSS=-6V, CSN="H") PD 5. DC characteristics Item High level input voltage Low level input voltage Low level output voltage Input leakage current Min. Typ. 150
Max. +31.5
10 100 4.2 4.2
Unit dB dB dB dB dB k k pF pF Vrms Vrms Vrms Vrms Vrms dB
Max.
Unit mW
Symbol VIH VIL VOL ILI
Condition
Min. 2.2 -0.3
Typ.
IO= 1.5mA
Max. AVDD+0.3 0.8 0.4 10
Unit V V V A 7
YAC526
6. AC characteristicsCL=20pF Item Serial clock frequency Serial clock pulse width high Serial clock pulse width Low SDATAI set up time SDATAI hold time CSN pulse width High CSN set up time CSN hold time SDATAO data output set up time SDATAO output delay time SDATAO output data hold time (data output stop) CSN, SCLK rise time CSN, SCLK fall time Zero-cross time out (Zero-cross MODE=A, C) Zero-cross time out (Zero-cross MODE=B) Regulation time until the data writing from a power supply injection (more than AVSS=90%) to LSI becomes effective. (CREF=10F) Symbol SCLK tPH tPL tSDVS tSDH tCSPH tCSVS tLTH tCSH tSSD tCSDH tR tF tTM1 tTM2 tPUP Min. 0 500 500 200 200 1000 500 200 Typ. Max. 1.0 Unit MHz ns ns ns ns ns ns ns ns ns ns ns ns ms ms ms
300 300 200 100 100 20 10 200
400
tF
90%
tCSPH
VIH VIH
CSN
VIL
10%
VIL
tCSVS SCLK
VIH VIL
tPH
VIH VIL
tLTH tSDVS
VIH VIL
tR
90%
VIL
10%
VIL
tPL
tSDH
VIH VIL VIH VIL
SDATAI
tCSDH
SDATAO
VOL
MSB tSSD
VOL
VOL
tCSH
Fig 1 Serial port timing
8
YAC526
Example of system configuration
When there is a fear that voltage exceeding the maximum rating is applied to the analog input pins (IN1 and IN2) of YAC526, connect diodes between AVDD and AVSS as shown below to prevent application of voltage exceeding the maximum rating to the input pins. Please make an analog domain and a digital domain into the ground side separated, respectively, and arrange YAC526 to an analog domain and the impedance to an AVSS pin should become small as much as possible. And please secure an area large enough, and a radiation noise should fully be stopped and an analog ground and a digital ground also make it. Control signals, such as serial interface, should wire a digital ground side collectively. In order to prevent interference with a control signal and an analog signal, be careful for an analog signal and a digital signal not to cross or not to adjoin.
Analog input terminal protection AVDD
IN1, IN2
AVSS
5V Since SDATAO is an open drain output pin, connect it to the power supply of the destination device connected through a resistor. SDATAI of YAC523/ YAC526 Digital Controller VDD VSS
YAC526
1 2 3 4 5 6 -6V 7 8 9 10 11 12 ZCEN1 ZCEN2 CSN SDATAI DGND REF DVSS SCLK SDATAO TE1 TE2 TE3 IN1 REF1A REF1B OUT1 AVDD AVSS AVSS AVDD OUT2 REF2B REF2A IN2 24 23 22 21 20 19 18 17 16 15 14 13 +6V -6V
Digital ground Analog ground
9
YAC526
Typical analog characteristic
Frequency response
Frequency response
10
YAC526
THD vs Input voltage 1kHz
Input voltage (Vrms)
THD vs Input voltage 20kHz
Input voltage (Vrms)
11
YAC526
THD vs Frequency (RL=OPEN, 10k)
12
YAC526
External dimensions of package
The figure in the parenthesis ( ) should be used as a reference. Plastic body dimensions do not include burr of resin.
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YAC526
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Note) The specifications of this product are subject to change without notice. Agency
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C

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